國立臺南大學教師基本資料

基本資料
姓名 高啟洲
系所 資訊工程學系
職稱 教授
校內分機 7700
傳真 (06)2606125
辦公室/研究室 ZC305-2
E-mail cckao@mail.nutn.edu.tw
網址 http://www.csd.nutn.edu.tw/
專長/研究領域 圖形理論 嵌入式系統晶片設計 積體電路電腦輔助設計
 

畢業學校國別主修學門學位修業期間
National Cheng Kung University中華民國Engineering ScienceB.S.1986/09~1990/06
National Cheng Kung University中華民國Electrilal EngineeringM.S.1994/09~1996/06
National Cheng Kung University中華民國Electrilal EngineeringPh.D.1996/09~2002/11

服務機關部門 / 系所職稱服務期間
Leader Management CollegeComputer Science and Information EngineeringAssistant Professor2003/01~2003/07
National PingTung Institute of commerceInformation TechnologyAssistant Professor2003/08~2007/07
National PingTung Institute of commerceInformation TechnologyAssociate Professor2007/08~2008/07
National University of Tainan, TaiwanComputer Science and Information EngineeringAssociate Professor2008/08~2015/01
National University of Tainan, TaiwanNetwork Team of Computer CenterChief2008/12~2010/07
National University of Tainan, TaiwanComputer Science and Information EngineeringProfessor2015/2~Now

著作
名稱高啟洲譯,“應用數值方法-使用MATLAB,”滄海圖書資訊公司(ISBN: 978-986-157-660-2)。原著:Steven. C. Chapra, 2008, “Applied Numerical Methods with MATLAB for Engineers and Scientists,” 2nd Ed. Mc Graw Hill.
年度2010
類別專書
摘要
關鍵字
名稱A Routability Driven Technology Mapping Algorithm for LUT Based FPGA Designs
年度2001
類別期刊論文
摘要 
關鍵字 
名稱An Improved Three-Step-Search Algorithm for Block Matching Motion Estimation and Its ASIC Design
年度2002
類別期刊論文
摘要 
關鍵字 
名稱A Technology Mapping Algorithm for Heterogeneous FPGAs
年度2002
類別期刊論文
摘要 
關鍵字 
名稱Design of Echo Cancellation and Noise Elimination for Speech Enhancement
年度2003
類別期刊論文
摘要 
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名稱An Efficient Algorithm for Finding the Minimal Area FPGA Technology Mapping
年度2005
類別期刊論文
摘要 
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名稱Design of Interactive E-Learning System
年度2005
類別期刊論文
摘要 
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名稱A Spatiotemporal Unsupervised Segmentation Algorithm for Video on-Chip System
年度2006
類別期刊論文
摘要 
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名稱Design of Field Programmable Gate Arrays with Hierarchical Interconnection Structures
年度2006
類別期刊論文
摘要 
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名稱Automated Layout Generator for Analog CMOS Circuits,” International Journal of Electronics
年度2007
類別期刊論文
摘要 
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名稱A High Flexibility Design for Clock Distribution Network in System on Chip
年度2007
類別期刊論文
摘要 
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名稱Computer-Aided Crosstalk Minimization Design for System-on-Chip
年度2008
類別期刊論文
摘要 
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名稱Performance-Driven Rotational Invariant Image Retrieval System
年度2010
類別期刊論文
摘要
關鍵字
名稱An Optimisation Communication Cost Algorithm for Dynamically Reconfigurable FPGAs
年度2010
類別期刊論文
摘要
關鍵字
名稱Performance-Driven Methods for Fine Granularity Scalable Video Coding
年度2010
類別期刊論文
摘要
關鍵字
名稱An Efficient Rotation and Reflection Invariance Region-Based Image Retrieval Framework
年度2010
類別期刊論文
摘要
關鍵字
名稱Heuristic Algorithms for Constructing Interference-free and Delay-Constrained Multicast Trees for Wireless Mesh Networks
年度2011
類別期刊論文
摘要
關鍵字
名稱Low Energy Cluster Head Prediction for Wireless Sensor Network
年度2011
類別期刊論文
摘要
關鍵字
名稱High Performance Rotation CORDIC Algorithm Based on Look-Ahead Techniques
年度2011
類別期刊論文
摘要
關鍵字
名稱BDD Synthesis for Mixed COMS/PTL Logic
年度2011
類別期刊論文
摘要
關鍵字
名稱Design and Implementation of Car Navigation and Cockpit Infotainment Embedded System on Open Service Gateway initiative
年度2012
類別期刊論文
摘要When wireless broadband technology is advanced increasingly in communication environment, the intelligent traffic information system research has been paid much attention. The purpose of this paper is to provide real-time vehicle location information and network communication services by building an open platform for embedded automotive information services and integrating the embedded technology, satellite positioning, and 3G mobile communications with wireless local area network. In this paper, the vehicle information system platform will be constructed on the Open Service Gateway initiative (OSGi). Using the OSGi platform, the vehicle information system can be intelligent vehicle systems. The main feature of our system not only provides general common traffic navigation system but also gives the forward-looking cockpit of multimedia services.
關鍵字OSGi, Multimedia, Car System, Global Positioning System, and Embedded System
名稱Interface Circuit Synthesis of System-on-Chip
年度2012
類別期刊論文
摘要Most of the Intellectual Properties (IPs) of System-on-Chip (SoC) are provided by different vendors, and thus they may have various characteristics, making the interface circuit synthesis of SoC a time-consuming and error-prone process. The main contribution of this paper is to present an interface synthesis algorithm for power minimization in interface circuit design of SoC. Moreover, we also study the power and area trade-off in interface circuit synthesis of such systems. By starting from the power-minimal solution, we perform a sequence of power relaxation operations and area-minimizing procedures to produce a set of solutions for a given SoC interface circuit design with power and area trade-off considerations. The experimental results demonstrate the effectiveness of our algorithms.
關鍵字
名稱Fast Intra Prediction Mode Decision for H.264/AVC Video Coding
年度2013
類別期刊論文
摘要Intra coding is used for reducing the spatial redundancy in video coding. H.264 supports several macroblocks of predictions for intra coding such as luma block four 16616 modes, nine 464 modes and chroma block four modes, which significantly improve intra coding efficiency, but increase the encoding complexity. In order to select the best mode, we need to calculate the cost of the various modes. In this paper, a fast intra prediction mode decision for H.264/AVC video coding is proposed. Based on Laplacian, this intra prediction mode decision detects edges and selects the best mode for the block. This mode decision can shorten the time to reduce the encoding time. The experimental results show that the proposed algorithm achieves an encoding time saving of 70% on average.
關鍵字H.264, Laplacian, intra mode, video coding, performance
名稱Improved Time-Multiplexed FPGA Architecture and Algorithm for Minimizing Communication Cost Designs
年度2013
類別期刊論文
摘要The Time-Multiplexed FPGA (TMFPGA) architecture can improve dramatically logic utilization by time-sharing logic but it needs a large amount of registers among sub-circuits for partitioning the given sequential circuits. In this paper, we propose an improved TMFPGA architecture to simplify the precedence constraints so that the number of the registers among sub-circuits can be reduced for sequential circuits partitioning. To demonstrate the practicability of the architecture, we also present a greedy algorithm to minimize the maximum number of the registers. Experimental results demonstrate the eRectives of the algorithm.
關鍵字TMFPGA; recon¯gurable computing; communication; architecture; algorithm
名稱Energy Efficient System-on-Chip Design for Wireless Body Area Sensor Network
年度2014
類別期刊論文
摘要This paper presents a novel energy-efficient on-chip design for wireless body area sensor networks (WBASN) focused towards pervasive healthcare applications. The network adopts a master-slave architecture, where the body-worn slave nodes periodically send sensor readings to a central master node. Unlike traditional peer-to-peer wireless sensor networks, the nodes in this WBASN are not deployed in an ad hoc fashion. The network is centrally managed and all communications are single-hop. A cluster algorithm is also presented so that all slave nodes are within the transmission range of the master nodes. It pretends that all slave nodes can share resources and information over the internet to reduce energy consumption. We have simulated for some experiments and implemented the design on system-on-chip platform. Compared to published and industrially used schemes, the power consumption of the proposed design is over 30% and 99% lower in the simulation and platform implementation, respectively.
關鍵字
名稱Clock Skew Minimization in Multiple Dynamic Supply Voltage with Adjustable Delay Buffers Restriction
年度2015
類別期刊論文
摘要Multiple dynamic supply voltage (MDSV) designs can be used to reduce power consumption. However, power modes operation with different voltages will cause increasing of the clock skew. The adjustable delay buffers (ADBs) can be used to minimize clock skew under different power modes but it is unlikely to add an unlimited number of ADBs in real world. In the paper, we first assign positions of adjustable delay buffers in a given clock tree to generate zero clock skew. If the number of ADBs is not satisfied with the constraints in the previous solution, a bottom-up method is then used to remove some adjustable delay buffers so that the clock skew is minimized under satisfying all constraints. Finally, the experimental results show that our design is very practical.
關鍵字Multiple dynamic supply voltage . Adjustable delay buffers . Clock skew . Determinate . Minimization
名稱Performance-Oriented Partitioning for Task Scheduling of Parallel Reconfigurable Architectures
年度2015
類別期刊論文
摘要Dynamic reconfiguration is important for reconfigurable platforms. Parallel reconfigurable computing (PRC) architecture consists of multiple dynamic reconfigurable computing (DRC) units. Thus, for a circuit to be implemented on a parallel reconfiguration system, it needs to be partitioned such that each sub-circuit can be executed to the DRC units in a PRC system. For high performance, this paper proposes a greedy algorithm that maximizes data parallelism for task scheduling of parallel reconfigurable architectures with unlimited resources. The proposed algorithm generates an optimal solution in polynomial time Oen3T, where n is the total number of the tasks. After obtaining a depth optimal solution, we reduce the resources without decreasing performance by the duplication packing operations whose time complexity is Oen3T. To demonstrate the performance of the proposed algorithm, we not only compare the existing methods with standard benchmarks but also implement on physical systems, like DSP, FIR, and JPEG. The experimental results show that the proposed algorithms satisfy the requirements of the performance-oriented systems with limited resources. Hence, we have sufficient reason to believe that the runtime must be reasonable for general applications.
關鍵字Dynamic reconfiguration, optimization, performance, parallel, and task scheduling
名稱Improved Edge-Directed Super Resolution
年度2016
類別期刊論文
摘要Super-resolution is necessary when the resolution of an image is lower than the screen resolution of a digital display device. Usually, interpolation operation is used in the image super-resolution process. However, the existing image interpolation methods suffer blurring problems in edge regions, so it is hard to produce sharp and clear visual effects. In this paper, we propose an improved edge-directed super-resolution, which keeps the edges sharp and provides good image quality. We first check whether there is an edge or not and then an interpolation method is selected according to the existence and the direction of an edge. Experimental results demonstrate that good image quality can be achieved.
關鍵字super-resolution, edge direction, resolution, image interpolation, sharp
名稱Shape-Based 3D Model Retrieval System
年度2016
類別期刊論文
摘要A large number of 3D models are created and available on the Web. Hence, it is necessary to develop efficient methods for retrieving the 3D models in a large database. In the past, 3D model used only the relationship between multi-points but losses the geometric structure of the original model. In this paper, a system, which can save the local geometry information of a model, is presented for robust shape retrieval from 3D models. The main contributions of this system include: 1) developing a high level descriptor of 3D model and 2) presenting algorithms to extract rotational invariant feature representations of a 3D model. The 3D model is first represented by 2D shapes of various angles. Each 2D shape is represented by a discrete set of n points. Next, an efficient algorithm for rotation invariance is proposed. In the algorithm, the shape contexts are clustered and labeled so that the shape contexts in each cluster have the same label. Using the histogram of label frequencies can search quickly and efficiently similar shapes. The experimental results have shown that our system is effective and has better retrieval results than the existing systems.
關鍵字 retrieval, 3D, rotation-invariance, shape based, and label
名稱Design of Low Power Snoop for Multi-Processor System on Chip
年度2016
類別期刊論文
摘要In multiprocessor system on chip, processors can access expectable shared data by using snoop protocol in different time. However, this design will generate a large number of snoops to consume unnecessary energy. The main objective of the paper is to reduce the number of snoops of the multiprocessor system by using an energy-saving architecture. The proposed method includes two designs: 1) snoop turning point design and 2) snoop buffer design. In the first design, a main key defined as the critical section in which the data accessed synchronously by multiple processors is presented. When the data in critical section are accessed by a processor, the critical section will be locked immediately such that other processors cannot access the data. Because the critical section processors have not common accessing data with the other processors, all snoops are removed after snooping turning point. In the second design, we add buffers to the caches and shared buses to label the number of common data processors. Using the design, only the processors labeled in buffers need to be snooped. The experimental results are shown that the proposed designs can achieve the purpose of energy saving.
關鍵字Multi-processor system on chip, Low power, Synchronous communication, Snoop, Coherence
名稱Stereoscopic Image Generation with Depth Image Based Rendering
年度2016
類別期刊論文
摘要In this paper, we proposed stereoscopic image generation methods of adjusting the depth value of edge pixels and improved hole filling procedures. For the conventional system, the smooth of depth map can reduce the incidence of image holes, but cause geometric distortions of the image depth. To solve the problems, the depth map is first expanded to refine the accuracy of image depth and the quality of images. Next, we derive a hardware-oriented method for 3D warping. Finally, appropriate blocks are searched to enhance the performance of image by improving hole-filling procedures. The experimental results demonstrate the proposed methods have great performance and practicability.
關鍵字Image generation, 3D, DIBR, Pre-processing, Hole-filling
名稱Improved Feature Extraction and Classification Methods for Electroencephalographic Signal based Brain-Computer Interfaces
年度2017
類別期刊論文
摘要Epilepsy, which is caused by abnormal discharges in the brain, is one of the most common neurological disorders. To diagnose efficiently epilepsy, it is valuable to classify electroencephalogram signal. In this paper, we proposed a new electroencephalogram signal classification method. The method is based on support vector machine to classify electroencephalogram signal. We first decompose electroencephalogram signal into bands by using discrete wavelet transform and compute the approximate entropy values in the bands. Next, by proposed feature selection method, the feature vectors are selected adaptively from statistical wavelet coefficients and approximate entropy values. Finally, the support vector machine is used to classify the selected features. The experimental results showed the proposed system has great performance and reliability and the total accuracy of classification can achieve 98%.
關鍵字electroencephalogram signal, epilepsy, support vector machine, discrete wavelet transform, approximate entropy
名稱Stereoscopic Image Generation with Depth Image Based Rendering
年度2017
類別期刊論文
摘要In this paper, we proposed stereoscopic image generation methods of adjusting the depth value of edge pixels and improved hole filling procedures. For the conventional system, the smooth of depth map can reduce the incidence of image holes, but cause geometric distortions of the image depth. To solve the problems, the depth map is first expanded to refine the accuracy of image depth and the quality of images. Next, we derive a hardwareoriented method for 3D warping. Finally, appropriate blocks are searched to enhance the performance of image by improving hole-filling procedures. The experimental results demonstrate the proposed methods have great performance and practicability.
關鍵字Image generation . 3D . DIBR . Pre-processing . Hole-filling
名稱“Design of Low Power Snoop for Multi-Processor System on Chip
年度2017
類別期刊論文
摘要In multiprocessor system on chip, processors can access expectable shared data by using snoop protocol in different time. However, this design will generate a large number of snoops to consume unnecessary energy. The main objective of the paper is to reduce the number of snoops of the multiprocessor system by using an energy-saving architecture. The proposed method includes two designs: 1) snoop turning point design and 2) snoop buffer design. In the first design, a main key defined as the critical section in which the data accessed synchronously by multiple processors is presented. When the data in critical section are accessed by a processor, the critical section will be locked immediately such that other processors cannot access the data. Because the critical section processors have not common accessing data with the other processors, all snoops are removed after snooping turning point. In the second design, we add buffers to the caches and shared buses to label the number of common data processors. Using the design, only the processors labeled in buffers need to be snooped. The experimental results are shown that the proposed designs can achieve the purpose of energy saving.
關鍵字Multi-processor systemon chip . Low power . Synchronous communication . Snoop . Coherence
名稱A Field Programmable Gate Array Chip with Hierarchical Interconnection Structure
年度1998
類別研討會
摘要 
關鍵字 
名稱Design and Implementation of an Adaptive FIR Filter based on Delayed Error LMS Algorithm
年度1999
類別研討會
摘要 
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名稱A Quadratic Programming Method for Interconnection Crosstalk Minimization
年度1999
類別研討會
摘要 
關鍵字 
名稱A Routability and Performance Driven Technology Mapping Algorithm for LUT Based FPGA Designs
年度1999
類別研討會
摘要 
關鍵字 
名稱A Technology Mapping Algorithm for Heterogeneous FPGAs
年度2003
類別研討會
摘要 
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名稱Area-Minimal Algorithm for LUT-Based FPGA Technology Mapping with Duplication-free Restriction
年度2004
類別研討會
摘要 
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名稱Design and Implementation of Interactive E-Learning System
年度2004
類別研討會
摘要 
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名稱DTA: Layout Design Tool for CMOS Analog Circuit
年度2004
類別研討會
摘要 
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名稱Efficient Speech Enhancement Method Using Kalman Filter and Spectral Subtraction
年度2004
類別研討會
摘要 
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名稱An Efficient Video Segmentation Algorithm Based On Accumulative Information Technique
年度2005
類別研討會
摘要 
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名稱A Communication Cost Minimization Algorithm for Dynamically Reconfigurable FPGA
年度2005
類別研討會
摘要 
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名稱A Fast Fine Granularity Scalable Coding for Video Streaming
年度2005
類別研討會
摘要 
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名稱Optimal Power Algorithm for Interface Design of System-on-Chip
年度2007
類別研討會
摘要 
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名稱An Improved Architecture for Optimizing Partitioning Cost of Time-Multiplexed FPGA
年度2007
類別研討會
摘要 
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名稱A Sequential Circuit Partitioning Algorithm for Dynamically Reconfigurable FPGAs
年度2007
類別研討會
摘要 
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名稱A Novel Flash A/D Converter with Ultra Short Latency and High Bubble Error Tolerance
年度2007
類別研討會
摘要 
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名稱Crosstalk Minimization Method for System-on-Chip
年度2007
類別研討會
摘要 
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名稱A Simple Scheme to Extend the Linearity of the Continuous-Time CMFB Circuit for Fully-Differential Amplifier
年度2008
類別研討會
摘要 
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名稱A Novel Digital Pixel Sensor System
年度2009
類別研討會
摘要 
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名稱Energy Efficient Clustering Communication Protocol for Wireless Sensor Network
年度2010
類別研討會
摘要
關鍵字
名稱Improved Snoop Protocol to Reduce Power in MPSoC
年度2011
類別研討會
摘要
關鍵字
名稱View Based Rotation Invariant 3D Shape Retrieval,” International Conference on Remote Sensing and Data
年度2011
類別研討會
摘要
關鍵字
名稱Adjustable Delay Buffers Assignment Algorithms for Clock Skew Minimization
年度2012
類別研討會
摘要
關鍵字
名稱Laplacian-Based H.264 Intra-Prediction Mode Decision
年度2012
類別研討會
摘要
關鍵字
名稱Clock Skew Minimization with Adjustable Delay Buffers Restriction
年度2013
類別研討會
摘要Multiple dynamic supply voltage (MDSV) designs can be used to reduce power consumption. However, switching of power modes may cause increasing of the clock skew because some modules operate with different voltages. In this paper, the adjustable delay buffers (ADBs) is used to minimize clock skew under different power modes. We first construct a clock tree to assign positions of adjustable delay buffers. Because adjustable delay buffers can increase additional delays, the clock skew can be optimized. It is unlikely to add an unlimited number of ADBs in real world so the number of ADBs must be limited. If the number of ADBs is not satisfied with the constraints in the previous solution, a bottom-up method is then used to remove some adjustable delay buffers. Finally, the experimental results show that the presented algorithms generate effective improvements.
關鍵字adjustable delay buffers, clock skew, source, assignment algorithm, minimization
名稱E-Health Design of EEG Signal Classification for Epilepsy Diagnosis
年度2013
類別研討會
摘要Epilepsy, which is caused by abnormal discharges in the brain, is one of the most common neurological disorders. To diagnose efficiently epilepsy, it is valuable to classify electroencephalogram signal. In this paper, we proposed a new e-health design of Electroencephalogram (EEG) signal classification for epilepsy diagnosis. The design is based on support vector machine to classify electroencephalogram signal. We first decompose electroencephalogram signal into bands by using discrete wavelet transform and compute the approximate entropy values in the bands. Next, by proposed feature selection method, the feature vectors are selected adaptively from statistical wavelet coefficients and approximate entropy values. Finally, the support vector machine is used to classify the selected features. The experimental results showed the proposed system has great performance and reliability and the total accuracy of classification can achieve 98%.
關鍵字e-health, electroencephalogram signal,
名稱Improved Depth-Image-Based Rendering System
年度2016
類別研討會
摘要
關鍵字
名稱Design of Embedded Sensor System Based on Parallel Reconfigurable Computing Platform
年度2016
類別研討會
摘要
關鍵字
名稱Implementation of Stereoscopic Image Generation
年度2016
類別研討會
摘要
關鍵字